SSE Shuffle

sse04

SHUFPS is able to shuffle any of the numbers from one source operand to the lower two destination fields; the upper two destination fields are generated from a shuffle of any of the four SP FP numbers from the second…

SSE Reciprocal

A basic building block operation in geometry involves computing divisions and square roots. For instance, transformation often involves dividing each x, y, z coordinate by the W perspective coordinate; normalization is another common geometry operation, which requires the computation of…

SSE Logical

sse10

ANDPS returns a bitwise AND between the two operands. ANDNPS returns a bitwise AND NOT between the two operands. ORPS returns a bitwise OR between the two operands. XORPS returns a bitwise XOR between the two operands.  

SSE Data Movement

sse08

MOVAPS transfers 128 bits of packed data from memory to SIMD floating-point registers and vice versa, or between SIMD floating-point registers, while MOVUPS makes no assumption for alignment. MOVHPS transfers 64 bits of packed data from memory to the upper…

SSE Conversion

sse12

These instructions support packed and scalar conversions between 128-bit SIMD floating-point registers and either 64-bit integer MMX registers or 32-bit integer x86 registers.  CVTPI2PS converts two 32-bit signed integers in an MMX register to the two least significant numbers of…

SSE Comparison

sse09

The basic single precision FP comparison instruction is similar to existing MMX instruction variants: it produces a redundant mask per float of all 1’s or all 0’s, depending upon the result of the comparison. This approach allows the mask to…

SSE2 64-bit FP instructions

In the introduction we have outlined the applications that require 64-bit precision, scientific simulations and CAD/CAM being notable examples. However, the transition from normal scalar code to 64-bit floating-point SSE2 code is complex and it may require some major design…

SSE2 preview

The forthcoming Intel Pentium 4 processor (code-named Willamette)  will feature a new set of SIMD instructions that improve the capabilities of both the MMX and SSE instruction sets. The key benefits of SSE2 are that MMX instructions can work on…