SSE2 extends the original SSE instruction set with support for double-precision floating-point arithmetic and a wider set of integer SIMD operations. The original SSE instructions operate mainly on four 32-bit single-precision floating-point values stored in a 128-bit XMM register. SSE2 adds the ability to operate on two 64-bit double-precision floating-point…

SSE, short for Streaming SIMD Extensions, is an x86 instruction set extension that allows one instruction to operate on multiple floating-point values at the same time. The most common SSE programming model uses 128-bit XMM registers. Each register can hold four 32-bit single-precision floating-point values: Instead of adding one float…

MMX was Intel’s first widely used SIMD extension for x86 processors. It introduced packed integer operations, allowing one instruction to process multiple small integer values at the same time. MMX is mostly historical today, but it is still useful to understand older multimedia, image-processing, audio, codec, and game code. Many…

SSE arithmetic lets one instruction operate on four 32-bit floating-point values packed in a 128-bit XMM register. This page explains the arithmetic instructions, their C/C++ intrinsics, the difference between packed and scalar forms, and the practical pitfalls that matter when writing or reading SSE code. Packed vs scalar: PS and…

MMX was Intel’s first widely adopted SIMD instruction set on x86 processors. It introduced 64-bit packed integer operations and made it possible to process multiple bytes, words, or doublewords with a single instruction. For the late 1990s, MMX was an important step forward. It was useful for image processing, audio…

The logical shift left, logical shift right and arithmetic shift right instructions shift each element by a specified number of bits. The logical left and right shifts also enable a 64-bit quantity (quadword) to be shifted as one block, assisting in data type conversions and alignment operations.   PSLLW mm,…

PAND mm, mm/m64 PANDN mm, mm/m64 POR mm, mm/m64 PXOR mm, mm/m64 The PAND (Bitwise Logical And), PANDN (Bitwise Logical And Not), POR (Bitwise Logical OR), and PXOR (Bitwise Logical Exclusive OR) instructions perform bitwise logical operations on 64-bit quantities. The destination operand is an MMX register, while the source…

This section describes example uses of the MMX instruction set to implement basic coding structures. Conditional Select Operating on multiple data operands using a single instruction presents an interesting issue: what happens when a computation is only done if the operand value passes some conditional check? For example, in an…

MMX was Intel’s first widely used SIMD instruction set for x86 processors. It introduced packed integer operations that could process multiple small values at once inside a single 64-bit register. For its time, this was extremely useful. MMX made it possible to accelerate image processing, audio processing, video decoding, graphics…