SSE2, short for Streaming SIMD Extensions 2, was one of the most important instruction-set extensions in the history of x86 processors. It was introduced by Intel with the Pentium 4 processor, code-named Willamette, as the successor to the original SSE instruction set. At the time, SSE2 was presented as an…
The recent arrival of the Intel Pentium 4 processor has generated the usual flurry of benchmarks and comments, most of them emphasizing that current software does not fully exploit the power of this new architecture (click here for an overview of the SSE2 instruction set). However, until the Pentium 4…
Instruction latency is one of the most important details to understand when optimizing SIMD code. A SIMD instruction may look simple at the source-code level, but the number of cycles required before its result can be used depends heavily on the exact instruction, operand type, vector width, instruction encoding, and…
The original version of this article was written in 2000, when the practical SIMD landscape on x86 processors was still small enough to fit in a compact table. At that time, the important questions were simple: That map was useful because the market was transitioning from scalar x86 code to…
The Intel P6 core, introduced with the Pentium Pro processor and used in all current Intel processors, features a RISC-like microarchitecture and an out-of-order execution unit, representing a radical shift from previous designs. The P6’s new dynamic execution micro-architecture removes the constraint of linear instruction sequencing between the traditional fetch…
The original version of this article showed how to detect MMX and the early SSE integer instructions with the CPUID instruction. That was enough in 2000, when the practical question was often: “Can I safely execute MMX or SSE code without crashing on this machine?” That question is still valid,…
The latest trend in PC games is 3D graphics: during the past few years, almost all kinds of games have turned to 3D graphics, greatly increasing the demand of processors with strong floating-point performance, because the front end of a typical 3D game software pipeline must perform object physics, geometry…
The Streaming SIMD Extensions enhance the Intel x86 architecture in four ways: 8 new 128-bit SIMD floating-point registers that can be directly addressed; 50 new instructions that work on packed floating-point data; 8 new instructions designed to control cacheability of all MMX and 32-bit x86 data types, including the ability…